v0.9.9 Beta
FluxEDA
Native Superconducting Circuit Design Suite
Developed by Superconducting Circuit Designers, for Superconducting Circuit Designers
Developed by Superconducting Circuit Designers, for Superconducting Circuit Designers
The Challenge
Existing EDA tools are built for CMOS. Superconducting circuits (SFQ, AQFP) have fundamentally different requirements: Josephson junction dynamics, pulse-based or AC signaling, picosecond timing, and specialized routing.
Adapting CMOS tools to superconducting design leads to inefficient workflows and missed optimizations.
Adapting CMOS tools to superconducting design leads to inefficient workflows and missed optimizations.
The Solution
FluxEDA is built from the ground up for superconducting circuit design. It understands Josephson junction circuits natively, not as an afterthought.
SFQ-first design philosophy with AQFP support coming soon.
SFQ-first design philosophy with AQFP support coming soon.
Key features
SFQ-Native Design
SFQ-Optimized Workflow
Grid-aligned placement for JTL routing. Cell libraries designed for SFQ primitives. Understands the "no wires" philosophy.
Hierarchical Design
Create custom symbols, build subcircuits, and manage cell libraries. Design complex systems with proper abstraction.
Symbol Editor
Create and edit cell symbols visually. Define pins, add graphics, set properties. Build your own process-specific libraries.
Multi-Process Support
Support for multiple foundry processes and custom libraries. JJ model management per library. Technology-aware netlist generation.
Integrated Simulation
Built-in JoSIM Simulation
Run time-domain simulations directly from the schematic. One-click netlist generation with hierarchical flattening—view and edit before simulation. Pre-flight checks catch errors before running. Integrated waveform viewer for instant feedback.
SFQ Waveform Viewer
CLK & SFQ timing-aware viewer with clock period markers and 0/1 pulse annotations. Signal filtering support.
Test Pattern Generator
Visual PULSE/PWL waveform editor. One-click SFQ pulse defaults based on your JJ parameters. Generate test patterns in seconds.
Visual Probe Setup
Select what to probe with a visual dialog. Elements grouped by cell instance—add voltage, current, or phase probes with checkboxes. One-click "All JJ phases" or "All currents" selection. No more manual editing of control files.
Analysis & Verification
Timing Analysis
Analyze signal propagation through your circuit. Identify critical paths. Cell timing data from characterization.
Design Verification Suite
Connectivity check for open pins. Collision detection. ERC (Electrical Rule Check).
Signal Path Tracer
Click any pin to trace signal paths. Multicolor highlighting for multiple paths. Follows JTL chains, splitters, and confluence buffers—stops at logic gates.
Cell Coloring
Assign custom colors to cells or groups for visual tracking. Highlight all instances of a cell type with one click. Invaluable for debugging complex circuits.
Back-Annotation
Import optimized component values from external tools back into schematic. Round-trip workflow with optimization tools.
Open Workflow
Industry-Standard Workflow
Adopts familiar EDA conventions and keyboard shortcuts. Cross-window copy/paste between schematics. Experienced designers will be productive immediately.
Collaboration-Ready
Human-readable JSON files enable seamless Git version control and cloud-based library sharing. Share libraries via Google Drive, Dropbox, or any cloud service. Export schematics as PNG, SVG, or PDF with customizable labels and backgrounds. No binary lock-in.
Technical specifications
Platform
Windows, macOS, Linux
Simulator
JoSIM and JSIM - RCSJ model, transient analysis,
File Format
JSON (schematics, symbols, libraries) - Git-friendly
Libraries
Primitives included; SFQ cell libraries available
License
Contact for licensing.
Development roadmap
Seamless InductEx and KLayout integration
LVS (Layout vs Schematic) and DRC verification
Verilog netlist export and behavioral simulation
Statistical timing analysis with process tolerances and jitter
Setup/hold timing checks for clocked SFQ circuits
Advanced mixed-signal and digital cell optimizer
Multi-user library access with role-based permissions
AQFP-aware waveform analysis and test patterns
Advanced Josephson junction models: π-junction, sin(2φ), and custom CPR support
Request Beta Access
Get early access to FluxEDA beta. All platforms included.
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